a cpld has programable logic gates. for certain defined inputs, it will give out defined outputs. it is possible to map these inputs and outputs to find out the relation between input and outputs. such a relation is known a truth table for a logic device. say for example, i want to know under what input conditions a particular cpld pin will give a high logic
If the CPLD only functioning as a truth table, and you know what pins are input pins,then it should be easy to find out the truth table. But if the CPLD has input clock and it is not the simple logic, then you are unable to find it out what is the data in the CPLD.