| Author |
 Topic  |
|
|
macgyver655
14 Posts |
 Posted - 11/21/2009 : 21:24:53
|
| With a GQ-4X and jtag adapter, would I be able to jtag and read the embedded logic of a PLD? |
|
| Reply #1
ZLM
2947 Posts |
Posted - 11/23/2009 : 08:36:07
|
| Yes. As long as you have a JTAG port on your PLD target board. |
 |
|
| Reply #2
macgyver655
14 Posts |
Posted - 11/23/2009 : 09:51:29
|
Yes. I have identified the JTAG pins on the chip. They are just floating so I will have to connect direct.
I should also be able to use pwr and gnd from the JTAG adapter to power the chip for the read, Correct?
Using the correct voltage of course. |
|
|
| Reply #3
ZLM
2947 Posts |
Posted - 11/23/2009 : 10:09:36
|
Yes.
Power the chip from your target board only.
Only connect signal and ground pin to programmer. |
|
|
| Reply #4
macgyver655
14 Posts |
|
| Reply #5
ZLM
2947 Posts |
Posted - 11/23/2009 : 10:38:05
|
It is better not to power the chip from the programmer. That because the programmer only can provide limited power source. We do not know how much power is needed to power your target board.
There is a power selection jumper on the adapter, you can try both way. |
|
|
| Reply #6
macgyver655
14 Posts |
Posted - 11/23/2009 : 11:04:24
|
Ok. Great. Thanks
One last question. On the chip I have there are 2 pins with different names then usual. Can you identify? I have TCK, TDI, TDO, TENA1 and VST. I was assuming the TENA1 is TMS. TENA meaning test enable? What do you think? |
|
|
| Reply #7
ZLM
2947 Posts |
Posted - 11/23/2009 : 11:22:15
|
| Not sure what those pins are. Check the chip datasheet. |
|
|
| Reply #8
macgyver655
14 Posts |
Posted - 11/23/2009 : 11:41:12
|
That is from the very, very limited datasheet I have.
They are all marked test pins and in their own group. On the target board, VST is tied to gnd.
This is an older chip (1997) and not available anywhere and no other info available which is why I'm trying to get a read on the logic. I have nothing to loose. |
|
|
| Reply #9
macgyver655
14 Posts |
Posted - 11/23/2009 : 11:44:30
|
I'm thinking VST to mean VSS(Gnd) test.
Then thinking tena to mean test enable for TMS: test mode select. |
|
|
| |
Topic |
|
Jtag
